IO mechanisms

Memory mapped IO

Memory mapped IO makes use of the same address bus for memory and IO devices. Memory on IO devices is mapped to address values and the CPU can then use them as normal. This is a simple approach and doesn't require much modification to the CPU but some amount of address space has to be reserved, which isn't ideal for processors with smaller word sizes.

Polling

Most IO devices are slower than the CPU so there needs to be a way to check when the IO devices are ready. One approach is polling. The CPU can poll the IO devices to see whether they are ready to give or receive data. There are two types of polling, busy-wait and interleaved. The former is a loop of checking the status until the device is ready, doing nothing in between. This is ideal for systems which need to respond quickly to IO devices but wastes CPU power and processing time for the average device. Interleaved polling allows the processor to do other task while it waits, but this can mean a delayed response to IO devices. Polling is a simple technique which doesn't need complex hardware or software and is ideal for some applications.

Handshaking

Handshaking can be used to synchronise the CPU and IO devices. The CPU can tell the IO device it's sent valid data and the IO device can tell the CPU it's ready.

Interrupts

Interrupts interrupt the current execution state of the processor with an interrupt service routine (ISR). The current state of the registers is pushed to the stack, then the ISR is executed and then the original state is restored from the stack. There are two types of interrupt - interrupt request (IRQ) and non-maskable interrupt (NMI). It is possible to ignore an IRQ but no and NMI. Interrupts allow a fast response and don't waste CPU time and power, but data transfer is still handled by the CPU creating a bottleneck and the hardware and software needed are more complex.

Direct memory access

Direct memory access (DMA) is used when large amounts of data need to be transferred quickly. It uses a DMA controller (DMAC) to take control of the system buses. It can then efficiently transfer data from IO devices to storage. The DMAC is optimised for data transfer and can be more than 10 times faster than CPU IO.

Modes of operation

  • Cycle stealing - The DMAC uses the system buses when they're not being used by the CPU

  • Burst mode - The DMAC takes control of the system buses for a fixed time unless the CPU receives a higher priority interrupt.

Organisation

  • Single bus detached - DMAC, IO, memory and processor share the same system buses. This is more straightforward but less efficient.

  • IO Bus - The DMAC uses the system buses and also has a dedicated IO bus which is connected to IO devices.